EUA5312
2-W Stereo Audio Power Amplifier
with Four Selectable Gain Settings
DESCRIPTOIN
The EUA5312 is a stereo audio power amplifier. When
driving 1 W into 8–Ω speakers, the EUA5312 has less than
0.8% THD+N across its specified frequency range. Included
within this device is integrated depop circuitry that virtually
eliminates transients that cause noise in the speakers.
Amplifier gain is internally configured and controlled by way
of two terminals (GAIN0 and GAIN1). BTL gain settings of 6
dB, 10 dB, 15.6 dB, and 21.6 dB are provided, while SE
gain is always configured as 4.1 dB for headphone drive. An
internal input MUX allows two sets of stereo inputs to the
amplifier .The
HP/LINE terminal allows the user to select
which MUX input is active, regardless of whether the
amplifier is in SE or BTL mode. In notebook applications,
where internal speakers are driven as BTL and the line outputs
(often headphone drive) are required to be SE, the EUA5312
automatically switches into SE mode when the SE/ BTL input
is activated, and this reduces the gain to 4.1 dB.
The EUA5312 consumes only 6mA of supply current during
normal operation.
FEATURES
2W per Channel Output Power Into 3-Ω Load
Internal Gain Control, Which Eliminates
External Gain-Setting Components
Input MUX Select Terminal
PC-Beep Input
Depop Circuitry Integrated
Two Input Modes Allowable with Single-Ended or
Fully Differential Input
Low Supply Current and Shutdown Current
Thermal Shutdown Protection
TSSOP-24 with Thermal Pad
RoHS Compliant and 100% Lead (Pb)-Free
APPLICATIONS
Notebook Computers
Multimedia Monitors
Digital Radios and Portable TVs
Block Diagram
DS5312 Ver 1.7 May. 2005
1
EUA5312
Typical Application Circuit
Figure 1. Application circuit using single-ended inputs and input MUX
Figure 2. Application circuit using differential input
DS5312 Ver 1.7 May. 2005
2
EUA5312
Pin Configurations
Package
Pin Configurations(Top View)
TSSOP-24 with a Thermal
Pad exposure on the bottom
of the package
Pin Description
PIN
PIN
I/O
DESCRIPTION
BYPASS
GAIN0
GAIN1
GND
LHPIN
LIN
LLINEIN
LOUT+
LOUT-
PC-BEEP
11
2
3
1,12
13,24
6
10
5
4
9
14
I
I
Tap to voltage divider for internal mid-supply bias generator
Bit 0 of gain control
Bit 1 of gain control
Ground connection for circuitry. Connected to thermal pad.
I
I
I
O
O
I
HP/ LINE
PV
DD
RHPIN
RIN
RLINEIN
ROUT+
ROUT-
17
7,18
20
8
23
21
16
I
I
I
I
I
O
O
SHUTDOWN
SE/ BTL
V
DD
22
15
19
I
I
I
Left channel headphone input, selected when SE/ BTL is held high.
Common left input for fully differential input. AC ground for single-ended
inputs.
Left channel line input, selected when SE/ BTL is held low.
Left channel positive output in BTL mode and positive output in SE mode.
Left channel negative output in BTL mode and high-impedance in SE mode.
The input for PC Beep mode. PC-BEEP is enabled when a > 1-V (peak-to-peak)
square wave is input to PC-BEEP or PCB ENABLE is high.
HP/LINE is the input MUX control input. When the HP/LINE terminal is held
high, the headphone inputs (LHPIN or RHPIN [6, 20]) are active. When the
HP/LINE terminal is held low, the line BTL inputs (LLINEIN or RLINEIN [5,
23]) are active.
Power supply for output stage.
Right channel headphone input, selected when SE/ BTL is held high
Common right input for fully differential input. AC ground for single-ended
inputs.
Right channel line input, selected when SE/ BTL is held low.
Right channel positive output in
BTL
mode and positive output in SE mode.
Right channel negative output in
BTL
mode and high-impedance in SE mode.
When held low, this terminal place the entire device, except PC-BEEP detect
circuitry, in shutdown mode.
Input and output MUX control. When this terminal is held high, the LHPIN or
RHPIN and SE output is selected. When this terminal is held low, the LLINEIN
or RLINEIN and BTL output are selected.
Analog V
DD
input supply. This terminal needs to be isolated from PV
DD
to
achieve highest performance.
DS5312 Ver 1.7 May. 2005
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EUA5312
Ordering Information
Order Number
EUA5312QIR1
Package Type
TSSOP 24
Marking
xxxx
EUA5312
xxxx
EUA5312
xxxx
EUA5312
xxxx
EUA5312
Operating Temperature range
-40 °C to 85°C
EUA5312QIR0
TSSOP 24
-40 °C to 85°C
EUA5312QIT1
EUA5312QIT0
TSSOP 24
TSSOP 24
-40 °C to 85°C
-40 °C to 85°C
EUA5312
□ □ □ □
Lead Free Code
1: Lead Free 0: Lead
Packing
R: Tape& Reel
T: Tube
Operating temperature range
I: Industry Standard
Package Type
Q: TSSOP
DS5312 Ver 1.7 May. 2005
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EUA5312
Absolute Maximum Ratings
Supply voltage, V
DD
------------------------------------------------------------------------------------------------ 6V
Input voltage, V
I
------------------------------------------------------------------------------ –0.3 V to V
DD
+0.3 V
Continuous total power dissipation---------------------------- internally limited (see Dissipation Rating Table)
Operating free-air temperature range, T
A
--------------------------------------------------------- –40
°
C to 85
°
C
Operating junction temperature range, T
J
------------------------------------------------------ - –40
°
C to 150
°
C
Storage temperature range, T
stg
------------------------------------------------------------------ -- –65
°
C to 150
°
C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds----------------------------------------- 260
°
C
Dissipation Rating Table
T
A
≦
25°C
DERATING FACTOR
3.76 W
33.2 mW/°C
PACKAGE
PWP
T
A
= 70°C
2.4096 W
T
A
= 85°C
2.1 W
Recommended Operating Conditions
Min
Supply voltage, V
DD
High-level input voltage, V
IH
Low-level input voltage, V
IL
Operating free-air temperature, T
A
SE/ BTL
SHUTDOWN
SE/ BTL
SHUTDOWN
-40
4.5
4
2
3
0.8
85
Max
5.5
Unit
V
V
V
°C
Electrical Characteristics at Specified Free-air Temperature, VDD = 5V, T
A
= 25°C
Symbol
V
OO
PSRR
Parameter
Output offset voltage
(measured differentially)
Power supply rejection ratio
High-level input current
Low-level input current
Supply current
Supply current, shutdown mode
Conditions
V
I
=0V, A
V
=2 V/V
V
DD
= 4 V to 5 V
V
DD
=5.5 V, V
I
= V
DD
V
DD
=5.5 V, V
I
= 0V
BTL mode
SE mode
EUA5312
Min.
Typ.
Max.
30
68
1
1
6
3
120
10
5
300
Unit
mV
dB
µA
µA
mA
µA
I
IH
I
IL
I
DD
I
DD(SD)
DS5312 Ver 1.7 May. 2005
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